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AI 内存的未来：超越 HBM（高带宽内存），迎接下一波创新浪潮
时间：
亚洲场次
2026 年 11 月 11 日，星期三
上午 10 点（香港/新加坡时间）
上午 11 点（日本/韩国时间）
语言：
英语
主讲人：
Vibhu Sharma，半导体技术专家
主持人：
Sanjeev Rana，北亚半导体研究主管，中信证券国际
报名链接：
Session [Asia]
https://research.citics.com/tel/info/Y1485
课程概述
本次网络会议将探讨下一代人工智能系统面临的最关键内存瓶颈、超越高带宽内存（HBM）的内存层级演进，以及从成本和功耗角度审视当前 HBM 技术路线图的长期可持续性。Vibhu Sharma 将分享他对静态随机存取存储器（SRAM）缩放挑战、磁阻式随机存取存储器（MRAM）及其他新兴内存技术、存算融合、存内处理架构、基于 CXL（Compute Express Link，计算快速链接）的内存扩展，以及器件创新相对于系统级架构与软件优化的相对重要性的观点。他还将探讨哪些内存技术与架构最有可能在未来十年驱动行业增长，以及投资者在内存生态系统中可能高估或低估了哪些未来机遇。
网络会议讲师介绍
Vibhu Sharma 是一位半导体技术专家，拥有超过 18 年的行业经验，涵盖超低功耗静态随机存取存储器（SRAM）、新兴非易失性内存、安全微控制器单元（MCU）以及人工智能基础设施平台技术。他拥有比利时 imec 的电气工程博士学位、美国纽约州立大学的电气工程硕士学位，以及剑桥大学的工商管理硕士（EMBA）学位。他合著了 Springer 出版的《无线传感器网络 SRAM 设计：能效与可变性鲁棒性技术》一书。他的内存与低功耗相关发明已被引用为超过 40 个外部专利家族中的现有技术，其中包括归属于台积电（TSMC）、三星（Samsung）、海力士（SK Hynix）、美光（Micron）和英伟达（NVIDIA）的专利。他在以内存为核心的 AI 及基础设施平台技术方面的思想领导力观点曾发表于《亚洲时报》（Asia Times）和福布斯科技委员会（Forbes Technology Council）。
中信证券智库
The future of AI memory:
Beyond HBM and the next wave of innovation
Date
Session (Asia call)
Wednesday, 11 November 2026
10am HKT/ SGT; 11am JPT/KST
Language
English
Speaker
Vibhu Sharma, Semiconductor technology leader
Moderator
Sanjeev Rana, Head of North Asia Semiconductors Research, CSI
Registration
Session [Asia]
https://research.citics.com/tel/info/Y1485
Course overview
This webinar will explore the most critical memory bottlenecks facing next-generation AI systems, the evolution of memory hierarchies beyond HBM, and the long-term sustainability of current HBM roadmaps from a cost and power perspective. Vibhu Sharma will share his views on SRAM scaling challenges, MRAM and other emerging memory technologies, memory-compute convergence, processing-in-memory architectures, CXL-enabled memory expansion, and the relative importance of device innovation compared with system-level architecture and software optimisation. He will also consider which memory technologies and architectures are most likely to drive industry growth over the next decade, and where investors may be overestimating or underestimating future opportunities across the memory ecosystem
Webinar instructor
Vibhu Sharma is a semiconductor technology leader with 18+ years spanning ultra-low-power SRAM, emerging nonvolatile memory, secure MCUs and AI-infrastructure platform technologies. He holds a Ph.D. in Electrical Engineering from imec, an M.S. in Electrical Engineering from the State University of New York and an Executive MBA from the University of Cambridge. He co-authored the Springer book SRAM Design for Wireless Sensor Networks: Energy Efficient and Variability Resilient Techniques. His memory and low-power inventions have been cited as prior art across more than 40 external patent families, including those assigned to TSMC, Samsung, SK Hynix, Micron and NVIDIA. His thought leadership on memory-centric AI, infrastructure platform technologies has appeared in Asia Times and the Forbes Technology Council.
报名与参会方式
线上参会链接：
https://research.citics.com/tel/info/Y1485
线上参会二维码：
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